Stage M2 : Spiking Neural Network (SNN) multilevel synapses in FD-SOI for edge AI at room & cryo temperatures

Le 3IT est un institut unique au Canada, spécialisé dans la recherche et le développement de technologies innovantes pour l’énergie, l’électronique, la robotique et la santé. L’IQ est un institut de pointe ayant pour mission d’inventer les technologies quantiques de demain et de les transférer en milieu industriel. 1QBit est un leader canadien dans le domaine du CQ, de l’IA et de l'informatique de haute performance. Son équipe multidisciplinaire conçoit des systèmes de contrôle, des compilateurs et des architectures de services pour les plateformes informatiques exotiques et de nouvelle génération. L'étudiant(e) bénéficiera ainsi d'un environnement de recherche exceptionnel où académiques et industriels collaborent étroitement pour développer les technologies futures de l'IA et du CQ. 

Contexte :

AI systems are widely spread in many fields of applications. In particular, deploying AI in quantum systems could open new avenue for advance computing. In this context the purpose of this PhD is to investigate low power SNN, which are known to be the most energy efficient avenue for AI systems, in FD-SOI technologies with phase change memory (PCM) synapse technology at room and cryogenic temperature.

Sujet : The main purpose of this  6 months internship is to evaluate SNN architectures based on analog layers (i.e. analog PCM and analog neurons) in P28/18 FD-SOI at room and cryogenic temperature conditions. Particularly, each design block of the SNN should be evaluated (simulation / measurements) at standard and ultra-low temperature with a power consumption optimization to reduce the self-heating during learning and inference phases to address both “off line” and “on line” programming scenarios. This study is based on previous work at room temperature on analog spiking neuron and synapse elements technologies with 28FDSOI process. The PCM multilevel will be investigated more accurately to push the actual limits on the wall PCM and should be extended to dot PCM. Thus, the PhD candidate will realize a deeper investigation of the device/design blocks and technological parameters which impact the final performance and will investigate how to enhance the behavior of device in such thermal conditions.

Environnement de travail : The internship will be carried between STMicroelectronics, SpinTech and  3IT UdS (France-Canada)

Research contract with STMicroelectronics in the framework of the French program Conventions Industrielles de Formation par la Recherche (CIFRE) in Cotutelle with the Université de Sherbrooke and University de l’UGA France. Net salary is around 2000 Euro/month

A candidate with an engineering background should have a master’s degree in device physics and electronics simulations design framework, e.g., Spice, CADENCE, Python …. A candidate with a knowledge of electrical characterization with thermal constraints at die level will be an asset for this position.